Designing Control Logic for Counterrow Pipeline Processor Using Petri Nets
نویسنده
چکیده
This paper approaches the problem of implementing an asynchronous control for a stage of the Sproull Counterrow pipeline processor (CFPP) as an exercise in combining two synthesis techniques recently developed for Petri nets. We rst synthesise a number of Petri net models of the CFPP stage control from its original \\ve-state-ve-event" description due to C. Molnar. Secondly, we implement these net models in asynchronous circuits, using two-phase and four-phase components. The latter stage involves synthesising circuits with arbitration elements from behavioural descriptions with internal connicts. This exercise appears to be quite instructive in the sense that it helps to estimate the scope and power of formal methods and today's automatic tools in assisting the process of asynchronous design.
منابع مشابه
Designing Control Logic for Counterflow Pipeline Processor Using Petri Nets
Abstract. This paper approaches the problem of synthesising an asynchronous control circuit for a stage of the Sproull Counterflow pipeline processor (CFPP) as an exercise in exploiting formal techniques available for Petri nets. We first synthesise a Petri net model of the CFPP stage control from its original “five-state-five-event” description due to Charles Molnar. Secondly, we implement tha...
متن کاملA rule-based evaluation of ladder logic diagram and timed petri nets for programmable logic controllers
This paper describes an evaluation through a case study by measuring a rule-based approach, which proposed for ladder logic diagrams and Petri nets. In the beginning, programmable logic controllers were widely designed by ladder logic diagrams. When complexity and functionality of manufacturing systems increases, developing their software is becoming more difficult. Thus, Petri nets as a high l...
متن کاملNon-Pure Nets and Their Transition Systems
This paper extends the theory of regions developed by Nielsen, Rozenberg and Thiagarajan within a set-theoretic framework, to accommodate the class of non-pure nets and their transition systems. Those are called semi-elementary nets and semi-elementary transition systems, respectively. The main motivation of such an extension is practical, the need to model asyn-chronous hardware structures, wh...
متن کاملCounterrow Pipeline Processor Architecture Counterrow Pipeline Processor Architecture
The counter ow pipeline processor architecture (cfpp) is a proposal for a family of microarchitectures for risc processors. The architecture derives its name from its fundamental feature, namely that instructions and results ow in opposite directions within a pipeline and interact as they pass. The architecture seeks geometric regularity in processor chip layout, purely local control to avoid p...
متن کاملذخیره در منابع من
با ذخیره ی این منبع در منابع من، دسترسی به آن را برای استفاده های بعدی آسان تر کنید
عنوان ژورنال:
دوره شماره
صفحات -
تاریخ انتشار 1995